PART |
Description |
Maker |
HD74LS113 HD74LS1113 |
Dual J-K Flip-Flops with Preset Dual J-K Negative-edge-triggered Flip-Flops(with Preset)
|
HITACHI[Hitachi Semiconductor]
|
HD74HC78 HD74HC78P |
Dual J-K Flip-Flops (with Preset/ Common Clear and Common Clock) Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock) FLIP-FLOP|DUAL|J/K TYPE|HC-CMOS|DIP|14PIN|PLASTIC
|
HITACHI[Hitachi Semiconductor]
|
HD74HC76 HD74HC76P |
FLIP-FLOP|DUAL|J/K TYPE|HC-CMOS|DIP|16PIN|PLASTIC Dual J-K Flip-Flops (with Preset and Clear)
|
HITACHI[Hitachi Semiconductor]
|
74ACT244SJX 74AC244 74AC244MTC 74AC244MTCX 74AC244 |
Octal Buffer/Line Driver with 3-STATE Outputs Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-SO 0 to 70 Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-SOIC 0 to 70
|
FAIRCHILD[Fairchild Semiconductor] Fairchild Semiconductor Corporation
|
DM74H103 |
(DM74H10x) Dual Flip-Flops
|
Rochester Electronics
|
MC10135 MC10135FN MC10135L MC10135P ON0571 |
Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CFP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CDIP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 Dual J-K Master-Slave Flip-Flop PIN ASSIGNMENT From old datasheet system
|
Motorola Mobility Holdings, Inc. Motorola, Inc. ONSEMI[ON Semiconductor]
|
MM74C73 MM74C73N MM74C76M MM74C76N |
Dual J-K Flip-Flops with Clear and Preset
|
FAIRCHILD[Fairchild Semiconductor]
|
HD74LS76A HD74LS76AP HD74LS76ARPEL |
Dual J-K Flip-Flops (with Preset and Clear)
|
Renesas Electronics Corporation
|
AT29C512-9 AT29C512-90JU AT29C512-70TC AT29C512-15 |
High Speed CMOS Logic Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-PDIP -55 to 125 64K X 8 FLASH 5V PROM, 90 ns, PDIP32 High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 90 ns, PQCC32 High Speed CMOS Logic Quad 2-Input Exclusive-NOR Gates 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PQCC32 High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PQCC32 High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PDIP32 High Speed CMOS Logic Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-SOIC -55 to 125 High Speed CMOS Logic Phase-Locked Loop with VCO and Lock Detector 16-SOIC -55 to 125 512K (64K x 8) 5-volt Only Flash Memory 512K 64K x 8 5-volt Only CMOS Flash Memory
|
Atmel, Corp. Atmel Corp. ATMEL[ATMEL Corporation]
|
HD74LVC74 |
Dual D-type Flip-Flops with Preset and Clear
|
Hitachi Semiconductor
|
U74LVC74AG-S14-R |
DUAL POSITIVE-EDGETRIGGERED D-TYPE FLIP-FLOPS
|
Unisonic Technologies
|
M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储 Triple 3-Input Positive-AND Gates 14-SO 0 to 70 Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70 Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70 Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70 Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70 Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70 2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM 2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V. 意法半导 STMICROELECTRONICS[STMicroelectronics] ST Microelectronics
|